# | Title | Journal | Year | Citations |
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|
1 | Synthesis of hardware models in C with pointers and complex data structures | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 2001 | 66 |
2 | A small-delay defect detection technique for dependable LSIs | | 2008 | 10 |
3 | A 0.13 μm CMOS technology integrating high-speed and low-power/high-density devices with two different well/channel structures | | 0 | 5 |
4 | Electromagnetic Design Techniques for Liquid Crystal Display Driver ICs | Journal of Display Technology | 2007 | 4 |
5 | A 9-M tr. access network system-on-a-chip for mega-bit Internet access at home | | 0 | 1 |
6 | Ultra-high-performance 0.13-μm embedded DRAM technology using TiN/HfO/sub 2//TiN/W capacitor and body-slightly-tied SOI | | 0 | 1 |
7 | A bipolar monolithic analog-to-pulsewidth converter | IEEE Transactions on Circuits and Systems | 1978 | 0 |
8 | Time complexity of gate assignment problem in one-dimensional array | Electronics and Communications in Japan | 1987 | 0 |
9 | A 0.13 μm full metal embedded DRAM technology targeting on 1.2 V, 450 MHz operation | | 0 | 0 |
10 | Shared At-Speed BIST for Parallel Test of SRAMs with Different Address Sizes | | 2008 | 0 |
11 | Path-finding for integration of porous SiOCH films (k∼2.5) in system-LSIs | | 2010 | 0 |
12 | Special Articles: The Future View and Expected Assignments on Printed Circuit Boards. Trends of Malti Layer PWB Meeting Down-sizing. | Circuit Technology | 1993 | 0 |
13 | Development of a CMOS imager LSI with focal‐plane motion detectors | Electronics and Communications in Japan | 2001 | 0 |