International Journal of Circuits and Architecture Design

0.1(top 100%)

impact factor

52(top 100%)

papers

58(top 100%)

citations

5(top 50%)

h-index

0.1(top 100%)

extended IF

all documents

doc citations

7(top 100%)

g-index

Top Articles

#	Title	Journal	Year	Citations
1	PGC: a pattern-based graphics controller	International Journal of Circuits and Architecture Design	2014	12
2	Low power 8051-MISA-based remote execution unit architecture for IoT and RFID applications	International Journal of Circuits and Architecture Design	2013	7
3	Approach to design a high performance fault-tolerant reversible ALU	International Journal of Circuits and Architecture Design	2016	7
4	Low-power smart passive REU for industrial IoT applications	International Journal of Circuits and Architecture Design	2016	6
5	Elimination of output gating performance overhead for critical paths in scan test	International Journal of Circuits and Architecture Design	2013	5
6	Low-voltage gate and body driven self-biased cascode current mirror with enhanced bandwidth	International Journal of Circuits and Architecture Design	2015	4
7	Design of fractional order integrators and differentiators using novel rational approximations	International Journal of Circuits and Architecture Design	2014	3
8	CMOS oscillator with MOS varactor and body bias tuning	International Journal of Circuits and Architecture Design	2016	3
9	An efficient arbitration technique for system-on-chip communications	International Journal of Circuits and Architecture Design	2014	2
10	Universal platform for functional testing of printed circuit boards	International Journal of Circuits and Architecture Design	2014	2
11	Curvature-correction in the bandgap voltage reference based on thermal compensation of beta and base-emitter voltage	International Journal of Circuits and Architecture Design	2016	2
12	FPGA implementation of linear model predictive controller for real-time position control of DC motor	International Journal of Circuits and Architecture Design	2015	1
13	Increased digitalisation of flash ADC in modern CMOS process: a review	International Journal of Circuits and Architecture Design	2015	1
14	Adder circuit design using quantum-dot cellular automata	International Journal of Circuits and Architecture Design	2016	1
15	Dynamically reconfigurable evolutionary multi-context robust cellular array design	International Journal of Circuits and Architecture Design	2016	1
16	Power-area trade-off in power gated FSM synthesis	International Journal of Circuits and Architecture Design	2016	1
17	Design of new NAND/NOR gates in QCA using single electron cells	International Journal of Circuits and Architecture Design	2016	1
18	Adaptive AI-based two-stage control for an induction machine drive	International Journal of Circuits and Architecture Design	2013	0
19	Design techniques for variability mitigation	International Journal of Circuits and Architecture Design	2013	0
20	A comprehensive comparison between LE and LM-based methodologies for optimisation of digital circuits	International Journal of Circuits and Architecture Design	2013	0
21	A programmable multi-step cyclic Vernier time-to-digital converter	International Journal of Circuits and Architecture Design	2013	0
22	Assertion based functional verification analysis of AMBA-AHB using System Verilog	International Journal of Circuits and Architecture Design	2014	0
23	Low power 0.4 V operational common mode feed forward transconductance amplifier	International Journal of Circuits and Architecture Design	2014	0
24	n, 2²ⁿ − 1, 2²ⁿ⁺¹ − 1}">An efficient VLSI design of a new CRT-based reverse converter for the moduli set {2ⁿ, 2²ⁿ − 1, 2²ⁿ⁺¹ − 1}	International Journal of Circuits and Architecture Design	2014	0
25	Design and simulation of a low voltage, low power OTA-based filter for biomedical signal recognition	International Journal of Circuits and Architecture Design	2014	0
26	Design of optimal nano-CMOS differential VCO for RF applications	International Journal of Circuits and Architecture Design	2014	0
27	A heuristic approach to variable ordering for logic synthesis engine design: algorithmic insight	International Journal of Circuits and Architecture Design	2014	0
28	A low-power voltage level converter for energy-efficient nanoelectronic circuits	International Journal of Circuits and Architecture Design	2015	0
29	A methodology for automated analysis of SPICE simulation data	International Journal of Circuits and Architecture Design	2015	0
30	Design and comparison of single and double edge synchronisation DLLs	International Journal of Circuits and Architecture Design	2015	0
31	An efficient realisation of FIFO buffers for NoC routers using technology dependent optimisations targeting LUT based FPGAs	International Journal of Circuits and Architecture Design	2016	0
32	m) versatile multiplier/adder architecture for cryptographic applications">GF(2^m) versatile multiplier/adder architecture for cryptographic applications	International Journal of Circuits and Architecture Design	2016	0
33	Real-time implementation of various colour space models	International Journal of Circuits and Architecture Design	2016	0
34	Performance improvement in tree multiplier using full swing GDI logic based CLA adder	International Journal of Circuits and Architecture Design	2016	0
35	0.5 V, 5 MHz active-RC biquad filter in 90 nm CMOS technology	International Journal of Circuits and Architecture Design	2016	0
36	Design of low power VCO based on single ended delay cells	International Journal of Circuits and Architecture Design	2016	0
37	Design of new NAND/NOR gates in QCA using single electron cells	International Journal of Circuits and Architecture Design	2016	0
38	Design of PVT compensated current starved ring oscillator	International Journal of Circuits and Architecture Design	2016	0
39	Automated physical verification of I/O pads using scaling factors	International Journal of Circuits and Architecture Design	2016	0
40	Low-power smart passive REU for industrial IoT applications	International Journal of Circuits and Architecture Design	2016	0
41	0.5 V, 5 MHz active-RC biquad filter in 90 nm CMOS technology	International Journal of Circuits and Architecture Design	2016	0
42	Real-time implementation of various colour space models	International Journal of Circuits and Architecture Design	2016	0
43	Design of low power VCO based on single ended delay cells	International Journal of Circuits and Architecture Design	2016	0
44	Effectiveness of body bias and hybrid logic: an energy efficient approach to design adders in sub-threshold regime	International Journal of Circuits and Architecture Design	2016	0
45	Effectiveness of body bias and hybrid logic: an energy efficient approach to design adders in sub-threshold regime	International Journal of Circuits and Architecture Design	2016	0
46	Performance improvement in tree multiplier using full swing GDI logic based CLA adder	International Journal of Circuits and Architecture Design	2016	0
47	Adder circuit design using quantum-dot cellular automata	International Journal of Circuits and Architecture Design	2016	0
48	Design of PVT compensated current starved ring oscillator	International Journal of Circuits and Architecture Design	2016	0
49	An efficient realisation of FIFO buffers for NoC routers using technology dependent optimisations targeting LUT based FPGAs	International Journal of Circuits and Architecture Design	2016	0
50	m) versatile multiplier/adder architecture for cryptographic applications">GF(2^m) versatile multiplier/adder architecture for cryptographic applications	International Journal of Circuits and Architecture Design	2016	0

Scientometrics

Overviews

Citing Bodies

International Journal of Circuits and Architecture Design

Top Articles